I am a Senior Systems Architect at NVIDIA, working on next-generation AI SoCs, including industry-leading platforms such as the recently launched Vera Rubin GPUs, next-generation architectures like Rosa Feynman unveiled at NVIDIA GTC, and advanced automotive SoCs powering self-driving and intelligent vehicle platforms My work focuses on architecting high-performance and reliable systems — with an emphasis on pushing the boundaries of performance, power efficiency, and system-level resilience.

I hold a Master’s degree in Electrical & Computer Engineering from the University of Wisconsin–Madison, where I was a Research Assistant in the STACS Lab under Professor Joshua San Miguel. The primary focus of my research was on hardware acceleration of Fully Homomorphic Encryption (FHE). My research also explored low-power computer systems through approximate computing, including the design of hardware accelerators for hard-to-predict branches using reconfigurable fabrics. I was also a Teaching Assistant for ECE353: Introduction to Microprocessor Systems.

Prior to NVIDIA, I spent over four years at Qualcomm, where I worked on Snapdragon platforms, contributing to system architecture, multiprocessor concurrency, and coherency across multiple chipsets. My work directly supported the successful tape-out of 12+ commercial SoCs used in millions of devices worldwide.

During my graduate studies, I interned at NVIDIA as a Systems Architect, focusing on Reliability, Availability, and Serviceability (RAS) architectures for the Grace CPU, and completed a co-op at AMD in the Radeon Technology Group, where I built simulation infrastructure and performance models for Instinct accelerators and Radeon GPUs targeting HPC and AI workloads.

I was honored to receive the DAC Young Researcher Fellowship at the 58th Design Automation Conference (DAC 2021), recognizing my contributions and potential in computer architecture research.

I completed my Bachelor’s in Electrical & Electronics Engineering from BITS Pilani, where my thesis on approximate computing was conducted under Professor Akash Kumar (TU Dresden).